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CPO roadmap targets higher-bandwidth optical links with TSMC silicon photonics

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Sig1.85Sen+3.55Env+1.60Soc+0.80Gov0.00

AI cluster demand is making optical interconnects practical, and the industry is shifting them closer to CPUs and GPUs via co-packaged optics. TSMC’s silicon photonics roadmap spans three stages, from a 1.6 Tbps pluggable optical engine to a 12.8 Tbps optical engine inside a processor package, enabling motherboard-level optics up to 6.4 Tbps, with 2x power efficiency and 10x lower latency.

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